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Hot questions in Analog and Digital Electronics

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42
GATE Electrical 2014 Set 2 | Question: 21
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter $1$ $0$ $0$ $0$ $1$ $0$ $0$ $1$ $0$ $0$ $1$ $1$ $1$ $1$ $0$ $0$
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter$1$ $0$ $0$ $0$$1$ $0$ $0$ $1$$0$ $0$ $1$ $1$$1$ $1$ $0$ $0$
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GATE Electrical 2014 Set 2 | Question: 22
The transistor in the given circuit should always be in active region. Take $V_{CE(sat)}$ = $0.2$ $V$ , $V_{BE}$=$0.7$ $V$. The maximum value of $R_c$ in $Ω$ which can be used, is ______________.
The transistor in the given circuit should always be in active region. Take $V_{CE(sat)}$ = $0.2$ $V$ , $V_{BE}$=$0.7$ $V$. The maximum value of $R_c$ in $Ω$ which can b...
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45
GATE Electrical 2013 | Question: 14
The input impedance of the permanent magnet moving coil $(PMMC)$ voltmeter is infinite. Assuming that the diode shown in the figure below is ideal, the reading of the voltmeter in Volts is $4.46$ $3.15$ $2.23$ $0$
The input impedance of the permanent magnet moving coil $(PMMC)$ voltmeter is infinite. Assuming that the diode shown in the figure below is ideal, the reading of the vol...
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GATE Electrical 2014 Set 2 | Question: 51
A $JK$ flip flop can be implemented by $T$ flip-flops. Identify the correct implementation.
A $JK$ flip flop can be implemented by $T$ flip-flops. Identify the correct implementation.
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GATE Electrical 2013 | Question: 18
A band-limited signal with a maximum frequency of $5\:kHz$ is to be sampled. According to the sampling theorem, the sampling frequency in $kHz$ which is not valid is $5$ $12$ $15$ $20$
A band-limited signal with a maximum frequency of $5\:kHz$ is to be sampled. According to the sampling theorem, the sampling frequency in $kHz$ which is not valid is$5$$1...
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GATE Electrical 2014 Set 2 | Question: 29
Assuming the diodes to be ideal in the figure, for the output to be clipped, the input voltage $v_i$ must be outside the range $-1$ $V$ to $-2$ $V$ $-2$ $V$ to $-4$ $V$ $+1$ $V$ to $-2$ $V$ $+2$ $V$ to $-4$ $V$
Assuming the diodes to be ideal in the figure, for the output to be clipped, the input voltage $v_i$ must be outside the range$-1$ $V$ to $-2$ $V$$-2$ $V$ to $-4$ $V$$+1$...
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GATE Electrical 2016 Set 1 | Question: 36
The current state $Q_{A} Q_{B}$ of a two $JK$ flip-flop system is $00$. Assume that the clock rise-time is much smaller than the delay of the $JK$ flip-flop. The next state of the system is $00$ $01$ $11$ $10$
The current state $Q_{A} Q_{B}$ of a two $JK$ flip-flop system is $00$. Assume that the clock rise-time is much smaller than the delay of the $JK$ flip-flop. The next sta...
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