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Hot questions in Analog and Digital Electronics
1
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1
GATE Electrical 2021 | Question: 37
A counter is constructed with three $D$ flip-flops. The input-output pairs are named $(D_{0},\:Q_{0})$, $(D_{1},\:Q_{1})$ and $(D_{2},\:Q_{2})$, where the subscript $0$ denotes the least significant bit. The output sequence is desired to be the Gray- ... $\overline{Q_{2}}Q_{0}+Q_{1}\overline{Q_{0}}$ $Q_{2}Q_{1}+\overline{Q_{2}}\:\overline{Q_{1}}$
A counter is constructed with three $D$ flip-flops. The input-output pairs are named $(D_{0},\:Q_{0})$, $(D_{1},\:Q_{1})$ and $(D_{2},\:Q_{2})$, wher...
Arjun
15.9k
points
Arjun
asked
Feb 19, 2021
Analog and Digital Electronics
gateee-2021
analog-and-digital-electronics
sequential-circuit
flip-flops
+
–
1
votes
1
answer
2
GATE Electrical 2015 Set 2 | Question: 38
A Boolean function $f(A, B, C, D) = \prod (1,5,12,15)$ is to be implemented using an $8 \times 1$ multiplexer ($A$ is $MSB$). The inputs $ABC$ are connected to the select inputs $S_{2} S_{1} S_{0}$ of the multiplexer respectively. Which one of the following ... $D, 1, D, 1, 1, 1, \overline{D}, D$ $\overline{D}, 0, \overline{D}, 0, 0, 0,D, \overline{D}$
A Boolean function $f(A, B, C, D) = \prod (1,5,12,15)$ is to be implemented using an $8 \times 1$ multiplexer ($A$ is $MSB$). The inputs $ABC$ are connected to the selec...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-2
analog-and-digital-electronics
combinational-circuits
multiplexer
+
–
0
votes
0
answers
3
GATE Electrical 2019 | Question: 35
The output expression for the Karnaugh map shown below is $Q \bar{R} +S$ $Q \bar{R} + \bar{S}$ $QR+S$ $Q R +\bar{S}$
The output expression for the Karnaugh map shown below is$Q \bar{R} +S$$Q \bar{R} + \bar{S}$$QR+S$$Q R +\bar{S}$
Arjun
15.9k
points
Arjun
asked
Feb 12, 2019
Analog and Digital Electronics
gate2019-ee
analog-and-digital-electronics
boolean-algebra
k-map
+
–
0
votes
0
answers
4
GATE Electrical 2019 | Question: 36
In the circuit shown below, $X$ and $Y$ are digital inputs, and $Z$ is a digital output. The Equivalent circuit is a NAND gate NOR gate XOR gate XNOR gate
In the circuit shown below, $X$ and $Y$ are digital inputs, and $Z$ is a digital output. The Equivalent circuit is aNAND gateNOR gateXOR gateXNOR gate
Arjun
15.9k
points
Arjun
asked
Feb 12, 2019
Analog and Digital Electronics
gate2019-ee
analog-and-digital-electronics
combinational-circuits
logic-gates
+
–
2
votes
1
answer
5
GATE Electrical 2014 Set 3 | Question: 21
A state diagram of a logic gate which exhibits a delay in the output is shown in the figure, where $X$ is the don’t care condition, and $Q$ is the output representing the state. The logic gate represented by the state diagram is $XOR$ $OR$ $AND$ $NAND$
A state diagram of a logic gate which exhibits a delay in the output is shown in the figure, where $X$ is the don’t care condition, and $Q$ is the output representing t...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-3
analog-and-digital-electronics
combinational-circuits
logic-gates
+
–
0
votes
0
answers
6
GATE Electrical 2012 | Question: 7
In the sum of products function $f(X,Y,Z) = \Sigma(2,3,4,5)$, the prime implicants are $\overline{X}Y, X \overline{Y}$ $\overline{X}Y, X \overline{Y}\overline{Z}, X \overline{Y}Z$ $\overline{X} Y \overline{Z}, \overline{X}YZ, X \overline{Y}$ $\overline{X} Y \overline{Z}, \overline{X}YZ, X \overline{Y} \overline{Z}, X \overline{Y}Z$
In the sum of products function $f(X,Y,Z) = \Sigma(2,3,4,5)$, the prime implicants are$\overline{X}Y, X \overline{Y}$$\overline{X}Y, X \overline{Y}\overline{Z}, X \overli...
Andrijana3306
1.4k
points
Andrijana3306
asked
Mar 23, 2018
Analog and Digital Electronics
gate2012-ee
analog-and-digital-electronics
boolean-algebra
sum-of-products
+
–
0
votes
1
answer
7
GATE Electrical 2018 | Question: 14
In the logic circuit shown in the figure, $Y$ is given by $Y=ABCD$ $Y=(A+B)(C+D)$ $Y=A+B+C+D$ $Y=AB+CD$
In the logic circuit shown in the figure, $Y$ is given by$Y=ABCD$$Y=(A+B)(C+D)$$Y=A+B+C+D$$Y=AB+CD$
Arjun
15.9k
points
Arjun
asked
Feb 19, 2018
Analog and Digital Electronics
gate2018-ee
analog-and-digital-electronics
logic-gates
boolean-algebra
+
–
0
votes
0
answers
8
GATE Electrical 2018 | Question: 37
Digital input signals A, B, C with A as the MSB and C as the LSB are used to realize the Boolean function $F=m_0+m_2+m_3+m_5+m_7$, where $m_i$ denotes the $i$ th minterm. In addition, $F$ has a don't care for $m_1$. The simplified expression for $F$ is given by ... $\overline{A}+C$ $\overline{C}+A$ $\overline{A} C + BC + A \overline{C}$
Digital input signals A, B, C with A as the MSB and C as the LSB are used to realize the Boolean function $F=m_0+m_2+m_3+m_5+m_7$, where $m_i$ denotes the $i$ th minterm...
Arjun
15.9k
points
Arjun
asked
Feb 19, 2018
Analog and Digital Electronics
gate2018-ee
analog-and-digital-electronics
boolean-algebra
+
–
0
votes
0
answers
9
GATE Electrical 2018 | Question: 36
Which one of the following statements is true about the digital circuit shown in the figure It can be used for dividing input frequency by $3$ It can be used for dividing input frequency by $5$ It can be used for dividing input frequency by $7$ It cannot be reliably used as a frequency divider due to disjoint internal cycles
Which one of the following statements is true about the digital circuit shown in the figureIt can be used for dividing input frequency by $3$It can be used for dividing i...
Arjun
15.9k
points
Arjun
asked
Feb 19, 2018
Analog and Digital Electronics
gate2018-ee
analog-and-digital-electronics
sequential-circuit
counters
+
–
0
votes
0
answers
10
GATE Electrical 2017 Set 2 | Question: 49
For the synchronous sequential circuit shown below, the output $Z$ is zero for the initial conditions $Q_{A}, Q_{B}, Q_{C}= Q'_{A}, Q'_{B}, Q'_{C}=100$ The minimum number of clock cycles after which the output $Z$ would again become zero is _________.
For the synchronous sequential circuit shown below, the output $Z$ is zero for the initial conditions $Q_{A}, Q_{B}, Q_{C}= Q'_{A}, Q'_{B}, Q'_{C}=100$The minimum number ...
Arjun
15.9k
points
Arjun
asked
Feb 26, 2017
Analog and Digital Electronics
gate2017-ee-2
numerical-answers
analog-and-digital-electronics
sequential-circuit
counters
+
–
0
votes
0
answers
11
GATE Electrical 2017 Set 1 | Question: 36
The output expression for the Karnaugh map shown below is $B \overline{D}+BCD$ $B \overline{D}+AB$ $\overline{B}D+ABC$ $B \overline{D}+ABC$
The output expression for the Karnaugh map shown below is$B \overline{D}+BCD$$B \overline{D}+AB$$\overline{B}D+ABC$$B \overline{D}+ABC$
Arjun
15.9k
points
Arjun
asked
Feb 26, 2017
Analog and Digital Electronics
gate2017-ee-1
analog-and-digital-electronics
boolean-algebra
k-map
+
–
0
votes
0
answers
12
GATE Electrical 2017 Set 2 | Question: 10
For a $3$-input logic circuit shown below, the output $Z$ can be expressed as $Q+\overline{R}$ $P\overline{Q}+R$ $\overline{Q}+R$ $P+\overline{Q}+R$
For a $3$-input logic circuit shown below, the output $Z$ can be expressed as $Q+\overline{R}$$P\overline{Q}+R$$\overline{Q}+R$$P+\overline{Q}+R$
Arjun
15.9k
points
Arjun
asked
Feb 26, 2017
Analog and Digital Electronics
gate2017-ee-2
analog-and-digital-electronics
combinational-circuits
logic-gates
+
–
0
votes
0
answers
13
GATE Electrical 2017 Set 1 | Question: 13
The Boolean expression $AB+A\bar{C}+BC$ simplifies to $BC + A\bar{C}$ $AB + A\bar{C} + B$ $AB + A\bar{C}$ $AB + BC$
The Boolean expression $AB+A\bar{C}+BC$ simplifies to$BC + A\bar{C}$$AB + A\bar{C} + B$$AB + A\bar{C}$$AB + BC$
Arjun
15.9k
points
Arjun
asked
Feb 26, 2017
Analog and Digital Electronics
gate2017-ee-1
analog-and-digital-electronics
boolean-algebra
+
–
0
votes
0
answers
14
GATE Electrical 2013 | Question: 37
The clock frequency applied to the digital circuit shown in the figure below is $1$ $kHz$. If the initial state of the output $Q$ of the flip-flop is ‘$0$’, then the frequency of the output waveform $Q$ in $kHz$ is $0.25$ $0.5$ $1$ $2$
The clock frequency applied to the digital circuit shown in the figure below is $1$ $kHz$. If the initial state of the output $Q$ of the flip-flop is ‘$0$’, then the ...
piyag476
1.6k
points
piyag476
asked
Feb 11, 2017
Analog and Digital Electronics
gate2013-ee
analog-and-digital-electronics
sequential-circuit
flip-flop
+
–
0
votes
0
answers
15
GATE Electrical 2014 Set 3 | Question: 51
A $3$-$bit$ gray counter is used to control the output of the multiplexer as shown in the figure. The initial state of the counter is $0002$. The output is pulled $high$. The output of the circuit follows the sequence $I_0$, $1$, $1$, $I_1$, $I_3$, $1$, $1$, $I_2$ ... $1$, $I_1$, $I_2$, $1$, $I_3$,$1$ $I_0$, $I_1$, $I_2$, $I_3$, $I_0$, $I_1$, $I_2$, $I_3$
A $3$-$bit$ gray counter is used to control the output of the multiplexer as shown in the figure. The initial state of the counter is $0002$. The output is pulled $high$....
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-3
binary-code
counter
multiplexer
+
–
1
votes
0
answers
16
GATE Electrical 2015 Set 1 | Question: 37
The figure shows a digital circuit constructed using negative edge triggered $J-K$ flip flops. Assume a starting state of $Q_{2}Q_{1}Q_{0}=000$. This state $Q_{2}Q_{1}Q_{0}=000$ will repeat after _______ number of cycles of the clock $CLK$.
The figure shows a digital circuit constructed using negative edge triggered $J-K$ flip flops. Assume a starting state of $Q_{2}Q_{1}Q_{0}=000$. This state $Q_{2}Q_{1}Q_{...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-1
flip-flops
latches
numerical-answers
+
–
0
votes
0
answers
17
GATE Electrical 2013 | Question: 44
Thyristor $T$ in the figure below is initially off and is triggered with a single pulse of width $10$ $μs$. It is given that $L=\bigg(\dfrac{100}{\pi }\bigg)\mu H$ and $C=\bigg(\dfrac{100}{\pi }\bigg)\mu F$. Assuming latching and holding currents of the ... zero and the initial charge on $C$ is zero, $T$ conducts of $10\mu s$ $50\mu s$ $100\mu s$ $200\mu s$
Thyristor $T$ in the figure below is initially off and is triggered with a single pulse of width $10$ $μs$. It is given that $L=\bigg(\dfrac{100}{\pi }\bigg)\mu H$ and...
piyag476
1.6k
points
piyag476
asked
Feb 11, 2017
Analog and Digital Electronics
gate2013-ee
gate-signal
converters
+
–
0
votes
0
answers
18
GATE Electrical 2015 Set 1 | Question: 33
The single-phase full-bridge voltage source inverter (VSI), shown in figure, has an output frequency of $50 \: \text{ Hz}$. It uses unipolar pulse width modulation with switching frequency of $50$ kHz and modulation index of $0.7$. ... the amplitude of the fundamental component in the output voltage $V_{\text{o}}$ (in Volt) under steady-state is ________.
The single-phase full-bridge voltage source inverter (VSI), shown in figure, has an output frequency of $50 \: \text{ Hz}$. It uses unipolar pulse width modulation with s...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-1
modulation-index
pulse-width-modulation
numerical-answers
+
–
0
votes
0
answers
19
GATE Electrical 2015 Set 2 | Question: 8
In the following circuit, the input voltage $V_{in}$ is $100 \sin(100 \pi t)$. For $100 \pi RC = 50$, the average voltage across $R$ (in Volts) under steady-state is nearest to $100$ $31.8$ $200$ $63.6$
In the following circuit, the input voltage $V_{in}$ is $100 \sin(100 \pi t)$. For $100 \pi RC = 50$, the average voltage across $R$ (in Volts) under steady-state is near...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-2
steady-state-operation
diodes
+
–
0
votes
0
answers
20
GATE Electrical 2014 Set 2 | Question: 49
An oscillator circuit using ideal op-amp and diodes is shown in the figure. The time duration for $+ve$ part of the cycle is $\Delta t_1$ and for $–ve$ part is $\Delta t_2$ . The value of $e^{\frac{\Delta t_1-\Delta t_2}{RC}}$ will be _____________.
An oscillator circuit using ideal op-amp and diodes is shown in the figure.The time duration for $+ve$ part of the cycle is $\Delta t_1$ and for $–ve$ part is $\Delta t...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-2
operational-amplifier
feed-back-resistor
numerical-answers
+
–
0
votes
0
answers
21
GATE Electrical 2014 Set 3 | Question: 55
A single-phase voltage source inverter shown in figure is feeding power to a load. The triggering pulses of the devices are also shown in the figure. If the load current is sinusoidal and is zero at $0,\pi , 2\pi$ …, the node voltage $V_{AO}$ has the waveform
A single-phase voltage source inverter shown in figure is feeding power to a load. The triggering pulses of the devices are also shown in the figure.If the load current i...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-3
pulses
invertor
+
–
1
votes
0
answers
22
GATE Electrical 2013 | Question: 49
In the figure shown below, the chopper feeds a resistive load from a battery source. $MOSFET\: Q$ is switched at $250 kHz$ with a $\text{duty ratio}$ of $0.4$. All elements of the circuit are assumed to be ideal. The PEAK-TO-PEAK source current ripple in $Amps$ is $0.96$ $0.144$ $0.192$ $0.288$
In the figure shown below, the chopper feeds a resistive load from a battery source. $MOSFET\: Q$ is switched at $250 kHz$ with a $\text{duty ratio}$ of $0.4$. All elemen...
piyag476
1.6k
points
piyag476
asked
Feb 11, 2017
Analog and Digital Electronics
gate2013-ee
ripple-current
electronics
+
–
0
votes
0
answers
23
GATE Electrical 2015 Set 2 | Question: 33
In the given rectifier, the delay angle of the thyristor $T_{1}$ measured from the positive going zero crossing of $V_{s}$ is $30^\circ$. If the input voltage $V_{s}$ is $100 \sin(100 \pi t) V$, the average voltage across $R$ (in Volt) under steady-state is _________.
In the given rectifier, the delay angle of the thyristor $T_{1}$ measured from the positive going zero crossing of $V_{s}$ is $30^\circ$. If the input voltage $V_{s}$ is ...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-2
bridge-rectifier
diodes
thyrister
numerical-answers
+
–
0
votes
0
answers
24
GATE Electrical 2015 Set 1 | Question: 8
In the following chopper, the duty ratio of switch $S$ is $0.4$. If the inductor and capacitor are sufficiently large to ensure continuous inductor current and ripple free capacitor voltage, the charging current (in Ampere) of the $5 V$ battery, under steady-state, is _______.
In the following chopper, the duty ratio of switch $S$ is $0.4$. If the inductor and capacitor are sufficiently large to ensure continuous inductor current and ripple fre...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-1
chopper
steady-state
numerical-answers
+
–
0
votes
0
answers
25
GATE Electrical 2014 Set 3 | Question: 48
In the bridge circuit shown, the capacitors are loss free. At balance, the value of capacitance $C_1$ in microfarad is _________.
In the bridge circuit shown, the capacitors are loss free. At balance, the value of capacitance $C_1$ in microfarad is _________.
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-3
bridge-circuit
source
numerical-answers
+
–
0
votes
0
answers
26
GATE Electrical 2015 Set 2 | Question: 15
When a bipolar junction transistor is operating in the saturation mode, which one of the following statements is TRUE about the state of its collector-base $(CB)$ and the base-emitter $(BE)$ junctions? The $CB$ ... . Both the $CB$ and $BE$ junctions are forward biased. Both the $CB$ and $BE$ junctions are reverse biased.
When a bipolar junction transistor is operating in the saturation mode, which one of the following statements is TRUE about the state of its collector-base $(CB)$ and the...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-2
bjt-as-switch
common-emitter
+
–
1
votes
0
answers
27
GATE Electrical 2015 Set 1 | Question: 15
In the $4 \times 1$ multiplexer, the output $F$ is given by $F = A \oplus B$. Find the required input $'I_{3}, I_{2}, I_{1}, I_{0}'$. $1010$ $0110$ $1000$ $1110$
In the $4 \times 1$ multiplexer, the output $F$ is given by $F = A \oplus B$. Find the required input $'I_{3}, I_{2}, I_{1}, I_{0}'$.$1010$$0110$$1000$$1110$
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-1
multiplexer
boolean-algebra
+
–
0
votes
0
answers
28
GATE Electrical 2013 | Question: 16
A bulb in a staircase has two switches, one switch being at the ground floor and the other one at the first floor. The bulb can be turned $ON$ and also can be turned $OFF$ by any one of the switches irrespective of the state of the other switch. The logic of switching of the bulb resembles an $AND$ gate an $OR$ gate an $XOR$ gate a $NAND$ gate
A bulb in a staircase has two switches, one switch being at the ground floor and the other one at the first floor. The bulb can be turned $ON$ and also can be turned $OFF...
piyag476
1.6k
points
piyag476
asked
Feb 11, 2017
Analog and Digital Electronics
gate2013-ee
logic-gates
truth-table
+
–
0
votes
0
answers
29
GATE Electrical 2014 Set 1 | Question: 21
A cascade of three identical modulo - $5$ counters has an overall modulus of $5$ $25$ $125$ $625$
A cascade of three identical modulo - $5$ counters has an overall modulus of$5$$25$$125$$625$
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-1
analog-and-digital-electronics
sequential-circuit
counters
+
–
0
votes
0
answers
30
GATE Electrical 2015 Set 1 | Question: 14
In the given circuit, the silicon transistor has $\beta = 75$ and a collector voltage $V_{C} = 9V$. Then the ratio of $R_{B}$ and $R_{C}$ is _________.
In the given circuit, the silicon transistor has $\beta = 75$ and a collector voltage $V_{C} = 9V$. Then the ratio of $R_{B}$ and $R_{C}$ is _________.
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-1
silicon-transistor
active-mode
numerical-answers
+
–
0
votes
0
answers
31
GATE Electrical 2013 | Question: 48
In the figure shown below, the chopper feeds a resistive load from a battery source. $MOSFET\: Q $ is switched at $250 kHz$ with a $\text{duty ratio}$ of $0.4$. All elements of the circuit are assumed to be ideal. The average source current in Amps in steady-state is $3/2$ $5/3$ $5/2$ $15/4$
In the figure shown below, the chopper feeds a resistive load from a battery source. $MOSFET\: Q $ is switched at $250 kHz$ with a $\text{duty ratio}$ of $0.4$. All eleme...
piyag476
1.6k
points
piyag476
asked
Feb 11, 2017
Analog and Digital Electronics
gate2013-ee
mosfet
diode
clippers
+
–
0
votes
0
answers
32
GATE Electrical 2014 Set 2 | Question: 35
A $10$ $kHz$ even-symmetric square wave is passed through a bandpass filter with centre frequency at $30$ $kHz$ and $3$ $dB$ passband of $6$ $kHz$. The filter output is a highly attenuated square wave at $10$ $kHz$. nearly zero. a nearly perfect cosine wave at $30$ $kHz$ a nearly perfect sine wave at $30$ $kHz$.
A $10$ $kHz$ even-symmetric square wave is passed through a bandpass filter with centre frequency at $30$ $kHz$ and $3$ $dB$ passband of $6$ $kHz$. The filter output isa ...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-2
band-limiting-circuit
filters
+
–
0
votes
0
answers
33
GATE Electrical 2014 Set 2 | Question: 23
The sinusoidal ac source in the figure has an rms value of $\dfrac{20}{\sqrt{2}}V$ . Considering all possible values of $R_L$, the minimum value of $R_S$ in $\Omega$ to avoid burnout of the Zener diode is _________.
The sinusoidal ac source in the figure has an rms value of $\dfrac{20}{\sqrt{2}}V$ . Considering all possible values of $R_L$, the minimum value of $R_S$ in $\Omega$ to a...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-2
analog-and-digital-electronics
zener-diode
reverse-saturation-current
numerical-answers
+
–
0
votes
0
answers
34
GATE Electrical 2014 Set 1 | Question: 49
Given that the op-amps in the figure are ideal, the output voltage $V_0$ is $(V_1-V_2)$ $2(V_1-V_2)$ $(V_1-V_2)/2$ $(V_1+V_2)$
Given that the op-amps in the figure are ideal, the output voltage $V_0$ is$(V_1-V_2)$$2(V_1-V_2)$$(V_1-V_2)/2$$(V_1+V_2)$
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-1
operational-amplifier
negative-feedback
+
–
0
votes
0
answers
35
GATE Electrical 2014 Set 3 | Question: 49
Two monoshot multivibrators, one positive edge triggered $(M_1)$ and another negative edge triggered $(M_2)$, are connected as shown in figure The monoshots $M_1$ and $M_2$ when triggered produce pulses of width $T_1$ and $T_2$ respectively, where $T_1>T_2$. The steady state output voltage $v_0$ of the circuit is
Two monoshot multivibrators, one positive edge triggered $(M_1)$ and another negative edge triggered $(M_2)$, are connected as shown in figureThe monoshots $M_1$ and $M_2...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-3
multi-vibrator
edge-triggered
+
–
0
votes
0
answers
36
GATE Electrical 2014 Set 2 | Question: 50
The $SOP$ (sum of products) form of a Boolean function is $\sum (0,1,3,7,11)$, where inputs are $A,B,C,D$ ($A$ is $MSB$, and $D$ is $LSB$ ... $(\overline{B}+C)(A+\overline{B})(\overline{A}+\overline{B})(\overline{C}+D)$
The $SOP$ (sum of products) form of a Boolean function is $\sum (0,1,3,7,11)$, where inputs are $A,B,C,D$($A$ is $MSB$, and $D$ is $LSB$). The equivalent minimized expres...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-2
boolean-function
least-significant-bit
+
–
0
votes
0
answers
37
GATE Electrical 2013 | Question: 39
In the circuit shown below the op-amps are ideal. Then $V_{out}$ in Volts is $4$ $6$ $8$ $10$
In the circuit shown below the op-amps are ideal. Then $V_{out}$ in Volts is$4$$6$$8$$10$
piyag476
1.6k
points
piyag476
asked
Feb 11, 2017
Analog and Digital Electronics
gate2013-ee
operational-amplifier
reverse-amplifier
+
–
0
votes
0
answers
38
GATE Electrical 2015 Set 2 | Question: 14
The filters $F1$ and $F2$ having characteristics as shown in Figures $(a)$ and $(b)$ are connected as shown in Figure $(c)$. The cut-off frequencies of $F1$ and $F2$ are $f_{1}$ and $f_{2}$ respectively. If $f_{1} < f_{2}$, the resultant circuit exhibits the characteristic of a Band-pass filter Band-stop filter All pass filter High-Q filter
The filters $F1$ and $F2$ having characteristics as shown in Figures $(a)$ and $(b)$ are connected as shown in Figure $(c)$.The cut-off frequencies of $F1$ and $F2$ are $...
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2015-ee-2
operational-amplifier
voltage-divider
+
–
0
votes
0
answers
39
GATE Electrical 2014 Set 3 | Question: 50
The transfer characteristic of the Op-amp circuit shown in figure is
The transfer characteristic of the Op-amp circuit shown in figure is
makhdoom ghaya
9.4k
points
makhdoom ghaya
asked
Feb 11, 2017
Analog and Digital Electronics
gate2014-ee-3
transfer-characteristics
operational-amplifier
+
–
0
votes
0
answers
40
GATE Electrical 2013 | Question: 14
The input impedance of the permanent magnet moving coil $(PMMC)$ voltmeter is infinite. Assuming that the diode shown in the figure below is ideal, the reading of the voltmeter in Volts is $4.46$ $3.15$ $2.23$ $0$
The input impedance of the permanent magnet moving coil $(PMMC)$ voltmeter is infinite. Assuming that the diode shown in the figure below is ideal, the reading of the vol...
piyag476
1.6k
points
piyag476
asked
Feb 11, 2017
Analog and Digital Electronics
gate2013-ee
tube
diode
electronics
+
–
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