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Most viewed questions in Analog and Digital Electronics

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GATE Electrical 2018 | Question: 14
In the logic circuit shown in the figure, $Y$ is given by $Y=ABCD$ $Y=(A+B)(C+D)$ $Y=A+B+C+D$ $Y=AB+CD$
In the logic circuit shown in the figure, $Y$ is given by$Y=ABCD$$Y=(A+B)(C+D)$$Y=A+B+C+D$$Y=AB+CD$
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GATE Electrical 2015 Set 2 | Question: 8
In the following circuit, the input voltage $V_{in}$ is $100 \sin(100 \pi t)$. For $100 \pi RC = 50$, the average voltage across $R$ (in Volts) under steady-state is nearest to $100$ $31.8$ $200$ $63.6$
In the following circuit, the input voltage $V_{in}$ is $100 \sin(100 \pi t)$. For $100 \pi RC = 50$, the average voltage across $R$ (in Volts) under steady-state is near...
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GATE Electrical 2019 | Question: 35
The output expression for the Karnaugh map shown below is $Q \bar{R} +S$ $Q \bar{R} + \bar{S}$ $QR+S$ $Q R +\bar{S}$
The output expression for the Karnaugh map shown below is$Q \bar{R} +S$$Q \bar{R} + \bar{S}$$QR+S$$Q R +\bar{S}$
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GATE Electrical 2014 Set 3 | Question: 48
In the bridge circuit shown, the capacitors are loss free. At balance, the value of capacitance $C_1$ in microfarad is _________.
In the bridge circuit shown, the capacitors are loss free. At balance, the value of capacitance $C_1$ in microfarad is _________.
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GATE Electrical 2019 | Question: 36
In the circuit shown below, $X$ and $Y$ are digital inputs, and $Z$ is a digital output. The Equivalent circuit is a NAND gate NOR gate XOR gate XNOR gate
In the circuit shown below, $X$ and $Y$ are digital inputs, and $Z$ is a digital output. The Equivalent circuit is aNAND gateNOR gateXOR gateXNOR gate
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GATE Electrical 2015 Set 1 | Question: 14
In the given circuit, the silicon transistor has $\beta = 75$ and a collector voltage $V_{C} = 9V$. Then the ratio of $R_{B}$ and $R_{C}$ is _________.
In the given circuit, the silicon transistor has $\beta = 75$ and a collector voltage $V_{C} = 9V$. Then the ratio of $R_{B}$ and $R_{C}$ is _________.
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GATE Electrical 2017 Set 1 | Question: 36
The output expression for the Karnaugh map shown below is $B \overline{D}+BCD$ $B \overline{D}+AB$ $\overline{B}D+ABC$ $B \overline{D}+ABC$
The output expression for the Karnaugh map shown below is$B \overline{D}+BCD$$B \overline{D}+AB$$\overline{B}D+ABC$$B \overline{D}+ABC$
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GATE Electrical 2014 Set 1 | Question: 49
Given that the op-amps in the figure are ideal, the output voltage $V_0$ is $(V_1-V_2)$ $2(V_1-V_2)$ $(V_1-V_2)/2$ $(V_1+V_2)$
Given that the op-amps in the figure are ideal, the output voltage $V_0$ is$(V_1-V_2)$$2(V_1-V_2)$$(V_1-V_2)/2$$(V_1+V_2)$
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GATE Electrical 2013 | Question: 39
In the circuit shown below the op-amps are ideal. Then $V_{out}$ in Volts is $4$ $6$ $8$ $10$
In the circuit shown below the op-amps are ideal. Then $V_{out}$ in Volts is$4$$6$$8$$10$
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GATE Electrical 2015 Set 2 | Question: 12
In the following circuit, the transistor is in active mode and $V_{C} = 2 V$. To get $V_{C} = 4 V$, we replace $R_{C}$ with $R′_{C}$. Then the ratio $R'_{C}$/ $R_{C}$ is _________.
In the following circuit, the transistor is in active mode and $V_{C} = 2 V$. To get $V_{C} = 4 V$, we replace $R_{C}$ with $R′_{C}$. Then the ratio $R'_{C}$/ $R_{C}$ i...
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GATE Electrical 2014 Set 2 | Question: 21
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter $1$ $0$ $0$ $0$ $1$ $0$ $0$ $1$ $0$ $0$ $1$ $1$ $1$ $1$ $0$ $0$
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter$1$ $0$ $0$ $0$$1$ $0$ $0$ $1$$0$ $0$ $1$ $1$$1$ $1$ $0$ $0$
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