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GATE Electrical 2013 | Question: 38
In the circuit shown below, $Q_1$ has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If $V_{cc}$ is +$5$ $V$, $X$ and $Y$ are digital signals with $0$ $V$ as logic $0$ and $V_{cc}$ as logic $1$, then the Boolean expression for $Z$ is $XY$ $\overline{X}Y$ $X\overline{Y}$ $\overline{XY}$

In the circuit shown below, $Q_1$ has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If $V_{cc}$ ...

piyag476

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piyag476 asked Feb 11, 2017

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