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41
GATE Electrical 2014 Set 2 | Question: 21
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter $1$ $0$ $0$ $0$ $1$ $0$ $0$ $1$ $0$ $0$ $1$ $1$ $1$ $1$ $0$ $0$
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter$1$ $0$ $0$ $0$$1$ $0$ $0$ $1$$0$ $0$ $1$ $1$$1$ $1$ $0$ $0$
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GATE Electrical 2014 Set 2 | Question: 22
The transistor in the given circuit should always be in active region. Take $V_{CE(sat)}$ = $0.2$ $V$ , $V_{BE}$=$0.7$ $V$. The maximum value of $R_c$ in $Ω$ which can be used, is ______________.
The transistor in the given circuit should always be in active region. Take $V_{CE(sat)}$ = $0.2$ $V$ , $V_{BE}$=$0.7$ $V$. The maximum value of $R_c$ in $Ω$ which can b...
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43
GATE Electrical 2015 Set 2 | Question: 12
In the following circuit, the transistor is in active mode and $V_{C} = 2 V$. To get $V_{C} = 4 V$, we replace $R_{C}$ with $R′_{C}$. Then the ratio $R'_{C}$/ $R_{C}$ is _________.
In the following circuit, the transistor is in active mode and $V_{C} = 2 V$. To get $V_{C} = 4 V$, we replace $R_{C}$ with $R′_{C}$. Then the ratio $R'_{C}$/ $R_{C}$ i...
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GATE Electrical 2014 Set 2 | Question: 51
A $JK$ flip flop can be implemented by $T$ flip-flops. Identify the correct implementation.
A $JK$ flip flop can be implemented by $T$ flip-flops. Identify the correct implementation.
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GATE Electrical 2017 Set 2 | Question: 10
For a $3$-input logic circuit shown below, the output $Z$ can be expressed as $Q+\overline{R}$ $P\overline{Q}+R$ $\overline{Q}+R$ $P+\overline{Q}+R$
For a $3$-input logic circuit shown below, the output $Z$ can be expressed as $Q+\overline{R}$$P\overline{Q}+R$$\overline{Q}+R$$P+\overline{Q}+R$
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GATE Electrical 2013 | Question: 18
A band-limited signal with a maximum frequency of $5\:kHz$ is to be sampled. According to the sampling theorem, the sampling frequency in $kHz$ which is not valid is $5$ $12$ $15$ $20$
A band-limited signal with a maximum frequency of $5\:kHz$ is to be sampled. According to the sampling theorem, the sampling frequency in $kHz$ which is not valid is$5$$1...
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GATE Electrical 2015 Set 1 | Question: 15
In the $4 \times 1$ multiplexer, the output $F$ is given by $F = A \oplus B$. Find the required input $'I_{3}, I_{2}, I_{1}, I_{0}'$. $1010$ $0110$ $1000$ $1110$
In the $4 \times 1$ multiplexer, the output $F$ is given by $F = A \oplus B$. Find the required input $'I_{3}, I_{2}, I_{1}, I_{0}'$.$1010$$0110$$1000$$1110$
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GATE Electrical 2016 Set 1 | Question: 36
The current state $Q_{A} Q_{B}$ of a two $JK$ flip-flop system is $00$. Assume that the clock rise-time is much smaller than the delay of the $JK$ flip-flop. The next state of the system is $00$ $01$ $11$ $10$
The current state $Q_{A} Q_{B}$ of a two $JK$ flip-flop system is $00$. Assume that the clock rise-time is much smaller than the delay of the $JK$ flip-flop. The next sta...
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GATE Electrical 2017 Set 1 | Question: 13
The Boolean expression $AB+A\bar{C}+BC$ simplifies to $BC + A\bar{C}$ $AB + A\bar{C} + B$ $AB + A\bar{C}$ $AB + BC$
The Boolean expression $AB+A\bar{C}+BC$ simplifies to$BC + A\bar{C}$$AB + A\bar{C} + B$$AB + A\bar{C}$$AB + BC$
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GATE Electrical 2014 Set 2 | Question: 29
Assuming the diodes to be ideal in the figure, for the output to be clipped, the input voltage $v_i$ must be outside the range $-1$ $V$ to $-2$ $V$ $-2$ $V$ to $-4$ $V$ $+1$ $V$ to $-2$ $V$ $+2$ $V$ to $-4$ $V$
Assuming the diodes to be ideal in the figure, for the output to be clipped, the input voltage $v_i$ must be outside the range$-1$ $V$ to $-2$ $V$$-2$ $V$ to $-4$ $V$$+1$...
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