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Hot questions in Analog and Digital Electronics

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42
GATE Electrical 2014 Set 2 | Question: 22
The transistor in the given circuit should always be in active region. Take $V_{CE(sat)}$ = $0.2$ $V$ , $V_{BE}$=$0.7$ $V$. The maximum value of $R_c$ in $Ω$ which can be used, is ______________.
The transistor in the given circuit should always be in active region. Take $V_{CE(sat)}$ = $0.2$ $V$ , $V_{BE}$=$0.7$ $V$. The maximum value of $R_c$ in $Ω$ which can b...
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GATE Electrical 2014 Set 2 | Question: 21
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter $1$ $0$ $0$ $0$ $1$ $0$ $0$ $1$ $0$ $0$ $1$ $1$ $1$ $1$ $0$ $0$
Which of the following is an invalid state in an $8$-$4$-$2$-$1$ Binary Coded Decimal counter$1$ $0$ $0$ $0$$1$ $0$ $0$ $1$$0$ $0$ $1$ $1$$1$ $1$ $0$ $0$
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GATE Electrical 2015 Set 2 | Question: 12
In the following circuit, the transistor is in active mode and $V_{C} = 2 V$. To get $V_{C} = 4 V$, we replace $R_{C}$ with $R′_{C}$. Then the ratio $R'_{C}$/ $R_{C}$ is _________.
In the following circuit, the transistor is in active mode and $V_{C} = 2 V$. To get $V_{C} = 4 V$, we replace $R_{C}$ with $R′_{C}$. Then the ratio $R'_{C}$/ $R_{C}$ i...
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GATE Electrical 2014 Set 2 | Question: 51
A $JK$ flip flop can be implemented by $T$ flip-flops. Identify the correct implementation.
A $JK$ flip flop can be implemented by $T$ flip-flops. Identify the correct implementation.
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GATE Electrical 2013 | Question: 18
A band-limited signal with a maximum frequency of $5\:kHz$ is to be sampled. According to the sampling theorem, the sampling frequency in $kHz$ which is not valid is $5$ $12$ $15$ $20$
A band-limited signal with a maximum frequency of $5\:kHz$ is to be sampled. According to the sampling theorem, the sampling frequency in $kHz$ which is not valid is$5$$1...
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