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401
GATE Electrical 2017 Set 2 | Question: 37
For the circuit shown in the figure below, it is given that $V_{CE}=\frac{V_{CC}}{2}$. The transistor has $\beta=29$ and $V_{BE}=0.7 V$ when the $B-E$ junction is forward biased. For this circuit, the value of $\frac{R_{B}}{R}$ is $43$ $92$ $121$ $129$
For the circuit shown in the figure below, it is given that $V_{CE}=\frac{V_{CC}}{2}$. The transistor has $\beta=29$ and $V_{BE}=0.7 V$ when the $B-E$ junction is forward...
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402
GATE Electrical 2017 Set 1 | Question: 31
Let the signal $x(t)=\sum_{k=-\infty }^{+\infty } (-1)^{k} \delta (t-\frac{k}{2000})$ be passed through an LTI system with frequency response $H(\omega )$ ... $2000+2000\cos (2000 \pi t)+2000\cos (4000 \pi t)$ $4000\cos (2000 \pi t)$ $2000\cos (2000 \pi t)$
Let the signal$x(t)=\sum_{k=-\infty }^{+\infty } (-1)^{k} \delta (t-\frac{k}{2000})$be passed through an LTI system with frequency response $H(\omega )$, as given in the ...
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409
GATE Electrical 2017 Set 2 | Question: 31
The output $y(t)$ of the following system is to be sampled, so as to reconstruct it from its samples uniquely. The required minimum sampling rate is $1000$ samples/s $1500$ samples/s $2000$ samples/s $3000$ samples/s
The output $y(t)$ of the following system is to be sampled, so as to reconstruct it from its samples uniquely. The required minimum sampling rate is$1000$ samples/s$1500$...
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411
GATE Electrical 2017 Set 1 | Question: 37
The logical gate implemented using the circuit shown below where $V_{1}$ and $V_{2}$ are inputs (with $0$V as digital $0$ and $5$V as digital $1$) and $V_{out}$ is the output, is NOT NOR NAND XOR
The logical gate implemented using the circuit shown below where $V_{1}$ and $V_{2}$ are inputs (with $0$V as digital $0$ and $5$V as digital $1$) and $V_{out}$ is the ou...
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413
GATE Electrical 2017 Set 2 | Question: 41
For the network given in the figure below, the Thevenin's voltage $V_{ab}$ is $-1.5$V $-0.5$V $0.5$V $1.5$V
For the network given in the figure below, the Thevenin's voltage $V_{ab}$ is$-1.5$V$-0.5$V$0.5$V$1.5$V
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414
GATE Electrical 2017 Set 2 | Question: 36
Which of the following systems has maximum peak overshoot due to a unit step input? $\frac{100}{s^{2}+10s+100} \\$ $\frac{100}{s^{2}+15s+100} \\ $ $\frac{100}{s^{2}+5s+100} \\$ $\frac{100}{s^{2}+20s+100}$
Which of the following systems has maximum peak overshoot due to a unit step input?$\frac{100}{s^{2}+10s+100} \\$$\frac{100}{s^{2}+15s+100} \\ $$\frac{100}{s^{2}+5s+100} ...
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417
GATE Electrical 2017 Set 2 | Question: 48
In the circuit shown in the figure, the diode used is ideal. The input power factor is ________. (Give the answer up to two decimal places).
In the circuit shown in the figure, the diode used is ideal. The input power factor is ________. (Give the answer up to two decimal places).
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418
GATE Electrical 2017 Set 2 | Question: 45
If the primary line voltage rating is $3.3$kV (Y side) of a $25$kVA, $Y-\Delta$ transformer (the per phase turns ratio is $5:1$), then the line current rating of the secondary side (in Ampere) is _______.
If the primary line voltage rating is $3.3$kV (Y side) of a $25$kVA, $Y-\Delta$ transformer (the per phase turns ratio is $5:1$), then the line current rating of the seco...
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420
GATE Electrical 2017 Set 2 | Question: 46
Consider the system described by the following state space representation ... $y(t)$ at $t=1$ sec (rounded off to three decimal places) is ___________.
Consider the system described by the following state space representation$\begin{bmatrix}\dot{x}_{1}(t)\\\dot{x}_{2}(t)\end{bmatrix}=\begin{bmatrix}0 &1 \\0 & -2\end{bmat...
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