In the circuit shown below, $Q_1$ has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If $V_{cc}$ is +$5$ $V$, $X$ and $Y$ are digital signals with $0$ $V$ as logic $0$ and $V_{cc}$ as logic $1$, then the Boolean expression for $Z$ is

1. $XY$
2. $\overline{X}Y$
3. $X\overline{Y}$
4. $\overline{XY}$

edited