Given, $V_{gs}$ is the gate-source voltage, $V_{ds}$ is the drain source voltage, and $V_{th}$ is the threshold voltage of an enhancement type NMOS transistor, the conditions for transistor to be biased in saturation are
1. $V_{gs}<V_{th};V_{ds}\geq V_{gs}-V_{th}$
2. $V_{gs}>V_{th};V_{ds}\geq V_{gs}-V_{th}$
3. $V_{gs}>V_{th};V_{ds}\leq V_{gs}-V_{th}$
4. $V_{gs}<V_{th};V_{ds}\leq V_{gs}-V_{th}$